Senior Analog Layout Engineer
In short
Senior Analog Layout Engineer needed for IC design team in Warsaw. Responsibilities include full-custom layout, floorplanning, and physical verification for analog/mixed-signal blocks. Requires B.
Sc., 5+ years of experience, and proficiency in EDA tools.
AI-written summary based on the listing content.
The Role
We are seeking a highly skilled Senior Analog Layout Engineer to join our IC design team. The ideal candidate will be responsible for the physical layout of high-performance analog and mixed-signal integrated circuits, ensuring top performance, reliability, and manufacturability. You will collaborate closely with circuit designers, verification engineers, and process teams to deliver silicon-proven designs in advanced technology nodes.
What You’ll Do
Key Responsibilities
- Develop and implement full-custom layout for analog and mixed-signal blocks (e.g., amplifiers, bandgaps, LDOs, DC/DC, ADC/DAC, PLL, etc.)
- Perform floorplanning and layout planning for complex analog macros
- Run and close DRC/LVS independently
- Apply advanced layout techniques including matching, shielding, guard rings, common-centroid structures, and symmetry for high-precision designs
- Optimize layout for performance, area, yield, and reliability
- Work closely with circuit designers to understand critical performance parameters
- Support tape-out activities
What You Bring
- Bachelor degree.
- 5 years or more of Analog layout experience.
- Analog Design Basics,
- Physical verification (DRC, LVS, ERC & DFM)
- Proficiency in Layout design environment and EDA tools (Cadence Virtuoso, Synopsys Custom Compiler etc.)
- Proficiency in debugging layout errors.
- ESD, Electromigration, Self-heating & IR Drop along with RC Delay, Matching & Decoupling.
- IC Technology (Fabrication, layout techniques, deep sub-micron effects, Layout design rules).
- Design for Manufacturing.
- Component placement, auto-routing.
- Routing Techniques: Shielding, Isolation etc.
- Tapeout and sign-off experience.
- Power Integrity (power routing to ensure stable & clean power to analog components).
- Layout development in multiple technologies & nodes
- Professional working proficiency in English (written and spoken) to collaborate in an international team
What Makes You Stand Out
- Experience in advanced nodes (28nm and below, FinFET a plus)
- High-speed, low-noise, or precision analog background
- Passion for building something from the ground up
Why Join Us
- Real impact — your work goes into production silicon
- Small team, zero bureaucracy
- Competitive salary + meaningful equity
Opportunity to grow into technical leadership
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