FPGA Verification Engineer

Resquant Усі вакансії

22000 - 29000 PLN / місяць

Praca zdalna

2 місяці тому

Коротко

FPGA Verification Engineer (Mid/Senior) at Resquant. Develop verification plans, testbenches (VHDL, Verilog, SystemVerilog), and simulation environments for quantum-resistant crypto. Salary: 22-29k PLN gross/month. Remote/Hybrid options.

Ключові слова

FPGA Verification VHDL Verilog SystemVerilog Cryptography ASIC Chip Security Quantum Computing

Стислий виклад підготував ШІ на основі тексту оголошення.

Resquant is a rapidly growing deep-tech startup focused on next-generation chip security and quantum-resistant cryptography solutions for dual-use and high-security applications. We develop advanced hardware security technologies designed to address emerging threats in post-quantum computing environments, working at the intersection of cryptography, semiconductor engineering, and secure system architecture.

We are building a team of highly skilled engineers passionate about cutting-edge FPGA and ASIC development, secure hardware design, and innovative defense-grade technologies.

Position: FPGA Verification Engineer (multiple)

Compensation: 22,000–29,000 PLN gross/month

Employment type: Polish employment contract (Umowa o Pracę / UoP) only; B2B cooperation is not available.

Resquant is looking for highly skilled FPGA Verification Engineers for various positions. This is a great opportunity to join a rapidly growing startup at an early stage, working on the latest trends in chip security and cryptography.

Main responsibilities:

Developing and maintaining verification plans based on design specifications at the block and subsystem level for quantum-resistant cryptographic algorithms and cryptographic processors.
Designing and implementing reusable, modular testbenches using VHDL, Verilog, and SystemVerilog.
Building simulation environments to verify complex FPGA and digital IPs.
Debugging and resolving design and verification issues in collaboration with design engineers.
Performing functional and code coverage analysis to ensure verification completeness.
Maintaining verification documentation including test plans, coverage reports, test case specifications, and bug tracking logs.
Cooperation with ASIC backend team.

What do we offer:

Full-time Senior and Mid-level positions in a 3-year project.
Salary range: 22,000–29,000 PLN gross/month depending on experience and seniority.
Employment exclusively under an employment contract (UoP). B2B cooperation is not available.
Participation in projects aimed at providing a backbone for chip security for dual-use markets.
Flexible working hours.
Ability to work remotely (Hybrid/Full).
Equity options.
Broad technical ownership.
Innovation and cutting-edge projects.
Career growth and visibility.
Opportunity to attend closed events with military representatives.